The present invention relates generally to the electrical, electronic and computer arts, and, more particularly, to semiconductor structures and methods of forming same.
A nanowire is a structure having a diameter on the order of a nanometer and having a very small dimension in the nanometer regime. Many different types of nanowires exist, including superconducting, metallic, semiconducting, insulating, and molecular. There are many applications where nanowires may be utilized in electronic, opto-electronic and nanoelectromechanical devices, such as, for example, as additives in advanced composites, as metallic conductors in nanoscale quantum devices, and as detection elements in electrochemical biosensors, among other applications.
It is known that nanowires on group III-V materials can be grown on silicon, <111> or another crystal orientation, opening perpendicular to a seed opening. There are two standard approaches to synthesizing nanowires: top-down and bottom-up. A top-down approach involves using patterning and lithography to reduce a larger piece of material to smaller structures, whereas a bottom-up approach synthesizes the nanowire by combining constituent adatoms (atoms adsorbed on a surface so that they will migrate over the surface).
In fabricating metal-oxide-semiconductor field-effect transistor (MOSFET) devices, it is known to use Group III-V materials, rather than silicon, to form a channel in the device. (See, e.g., U.S. Pat. No. 7,928,427 to Chang, the disclosure of which is hereby incorporated by reference herein in its entirety.) Unfortunately, however, conventional methods of forming III-V channels limit the ability to employ high-temperature process steps in the device fabrication.